1、功能说明
     1、GTIMA3 GTIMA4在ATIM1周期下计数

2、使用环境
    软件开发环境：KEIL MDK-ARM V5.34
    软件开发环境：IAR EWARM 8.50.1

    芯片支持：
        N32H730  
        N32H735   
        N32H735EC
        N32H760
        N32H762
        N32H765
        N32H765EC
        N32H785
        N32H785EC
        N32H787

3、使用说明
    系统配置；
        1、时钟源：HSI+PLL
        2、系统时钟频率：
          M7核: 600MHz
        3、端口配置：
			PB6选择为GTIMA3的CH1输出
			PA0选择为GTIMA4的CH1输出
			PA8选择为ATIM1的CH1输出
        4、TIM：
			ATIM1周期触发GTIMA3 GTIMA4的门控

    使用方法：
        1、编译后打开调试模式，用示波器或者逻辑分析仪观察ATIM1_CH1、GTIMA3_CH1、GTIMA4_CH1的波形
        2、程序运行后，GTIMA3_CH1 15倍周期ATIM1_CH1，GTIMA4_CH1 10倍周期ATIM1_CH1

4、注意事项
    主定时器的时钟需要大于等于从定时器
    
1. Function description
     1. GTIMA3 GTIMA4 counts under the ATIM1 cycle

2. Development environment
    Software development environment: KEIL MDK-ARM V5.34
    Software development environment: IAR EWARM 8.50.1

    Supported chips:
        N32H730  
        N32H735   
        N32H735EC
        N32H760
        N32H762
        N32H765
        N32H765EC
        N32H785
        N32H785EC
        N32H787

3. How to use
   System Configuration:
        1. Clock source: HSI+PLL
        2. System Clock frequency: 
            M7 Core:     600MHz
        3. Port configuration:
			PB6 is selected as the CH1 output of GTIMA3
			PA0 is selected as the CH1 output of GTIMA4
			PA8 is selected as the CH1 output of ATIM1
        4. TIM:
			ATIM1 period triggers the gating of GTIMA3 GTIMA4
     Instructions:
         1. After compiling, turn on the debug mode, use an oscilloscope or logic analyzer to observe the waveforms of ATIM1_CH1, GTIM3_CH1, and GTIM4_CH1
         2. After the program runs, GTIM3_CH1 15 times cycle ATIM1_CH1, GTIM4_CH1 10 times cycle ATIM1_CH1
4. Attention
    The clock of the master timer needs to be greater than or equal to that of the slave timer.

